StructureScope
Compact, high-performance system for transient thermal characterization and power cycle testing. First class support for Si and SiC devices.
- Measure Rth-jc (JESD51-14) quickly and repeatably.
- Visualize die attach degradation in real time with automatic cycle-by-cycle structure function extraction during power cycle testing.
- For power module characterization, synchronize multiple StructureScopes to extract the mutual thermal impedance network between individual dies.
One platform for transient thermal impedance testing and power cycling
Capture cooling curves from compute structure functions with ease. Obtain Rth-jc (TDIM), Rth-ja, Zth(t) information within no time at all.
Subject devices to up to 137 W of power cycling. Perform cycle-by-cycle structure function extraction to track degradation behavior.
Our novel low current heating method means fine probes can be used to make electrical contact, adding minimal thermal capacitance to small packages.
Pair StructureScope with Thermal Nodes, our next generation software platform with powerful post processing capabilities, flexible automation options, and built in thermal simulation engine.
Two applications, included with every system
Runs the instrument. Set up transient thermal and power cycling tests, manage calibrations, and evaluate and report results.
- Test templates for JESD51-14 and AQG 324
- Automated K-factor calibration
- Zth, Rth-jc and degradation reports
- Python API, REST and SCPI
Turns measured transients into cumulative and differential structure functions, and compares them across devices and cycle counts.
- Cumulative and differential structure functions
- Overlay and difference views across cycles
- Foster and Cauer model export to SPICE
- CSV and HDF5 import and export
Built for the most challenging transient thermal testing scenarios
StructureScope's noise analog front end, combined with fast, clean settling, allows for accurate characterization of even the most challenging devices. From tiny QFN's to ultra high power density devices with diamond substrates, StructureScope does it all.
| Tj settling time | ≤ 5 µs |
| TSEP Sampling | 1 MS/s, 16 bit |
| Effective Tj resolution | 0.01 K |
| Effective Tj RMS noise | ≤ 0.05 K |
| Effective Tj peak-to-peak noise | ≤ 0.45 K |
| Maxiumum DUT heating power | 137 W |
| Supported TSEP | Body diode Vf, VGS (sat), VGE (forward-active) |
| Supported device types | Si MOSFET, Si IGBT, SiC MOSFET |
Qualification and failure analysis
For reliability and packaging teams at device, module and system manufacturers.
- Rth-jc for datasheets to JESD51-14
- Lifetime testing to AQG 324
- Root-cause analysis of package degradation
Research and teaching
For university groups working on devices, packaging materials and electro-thermal modeling.
- Compact thermal models for simulation
- Open data export and scripting
- Shared-facility scheduling and user accounts